IEEE 1588 PTP Slave

The Optimal Technologies 1588 Slave IP Core implements the slave network segment of the IEEE 1588-2002 specification. It realizes a module that is capable of achieving sub-microsecond clock synchronization to an IEEE 1588-2008 compliant master clock through the exchange of ethernet packets. Since IEEE 1588-2008 achieves sub-microsecond clock synchronization, applications include:

  • Industrial measurement and control
  • Industrial ethernet communications
  • Wireless base station synchronization
  • Military and software-defined radio

The 1588 Slave IP Core is optimized to deliver maximum performance (see section ‘Specifications’) whilst utilizing minimal FPGA resources. The interface is highly customizable and can be integrated with any physical layer ethernet chip, regardless of physical layer interface (MII or RMII). It also provides an addressable data-bus which allows the user to read relevant data, for example, the current level of synchronization error. It supports multiple IEEE 1588 Profiles, including Default Profile and Power Profile and can be multiplexed with other modules which require the use of the ethernet bus, for example, the Optimal Technologies IEC 61850 IP Core, which allows for multiple protocols and functionality to occur via a single ethernet endpoint.

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